There have been widely used switching power supply units having an integrated semiconductor circuit that includes a switching element (e.g. transistor switch) and a drive circuit controlling the switching element to control the output voltage of the switching power supply unit.
FIG. 3 shows a circuit arrangement of a conventional switching power supply unit, in which a semiconductor integrated circuit (IC) 10 has a transistor switch Qo and a drive circuit 20 for driving the transistor switch Qo. This transistor switch Qo is directly connected in series to a coil Lo via a pad Po of the IC 10. The voltage appearing at the node of the pad Po and the coil Lo is rectified and smoothed by a diode Do and a capacitor Co to provide a dc output voltage Vout.
As the transistor switch Qo is turned on, switching current Io is supplied from a power supply (e.g. a battery) having an input voltage Vin to the transistor switch Qo via the coil Lo and the pad Po, and the transistor switch Qo. The current Io grows larger with time after the transistor switch Qo is turned on. If the transistor switch Qo is turned off, the energy accumulated in the coil Lo is liberated therefrom, which is rectified and smoothed by the diode Do and the capacitor Co before it is provided as the output voltage Vout of the power supply unit, converted from the input voltage Vin.
The magnitude of the output voltage Vout is determined by the duty ratio Ton/(Ton+Toff) of ON time Ton to OFF time Toff of the transistor switch Qo. Usually, the duty ratio is controlled by feeding the drive circuit 20 a feedback voltage indicative of the output voltage Vout in such a way that the feedback voltage equilibrate with a predetermined reference voltage, thereby holding the output voltage Vout at a predetermined level.
There is a combined resistance Rp for the pad and the bonding wire connected thereto that arises from the resistances of the pad Po and the bonding wires and the contact resistance therebetween. In FIG. 3, the combined resistance Rp is shown in parentheses. A voltage drop caused by the combined resistance Rp will result in an electric power loss determined by Rp and Io.
In order to reduce the voltage drop due to the combined resistance Rp, multiple bonding wires can be parallelly connected to the terminal (see, for example, Japanese Patent Applications Laid Open No. H7-202097 and No. 2000-114307).
A wafer-level chip-sized package (WL-CSP) type IC has been increasingly adopted for miniaturization of the IC. A WL-CSP type IC has pluralities of ball-shaped terminals (hereinafter referred to as ball terminals) arranged in a two-dimensional grid array structure (the terminals in the structure referred to as ball grid array (BGA) terminals) to establish electric connections with external circuits. Each of the ball terminals is made very small in order to attain a high terminal density in the IC package.
It is therefore difficult to connect a multiplicity of bonding wires in parallel to a ball terminal of the BGA structure as shown in the above cited references. Moreover, since the ball terminals are arranged in the lattice structure, it is also difficult to make a particular terminal, such as one connected to a transistor switch, larger than other terminals.
It is noted that the current Io has a comparatively large magnitude since it pertains to the switching of a transistor switch, so that it can exceed the withstand current level (or permissible current level) of one ball terminal. The ball terminal connected to a semiconductor switch generates heat determined by the contact resistance thereof and the current Io. As a consequence, these ball terminals connected to a transistor switch are in jeopardy of being melt down by heat.